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Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compe...
Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
- 2022-02-02 23:02:14下载
- 积分:1
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100个VHDL的例子
100个VHDL的例子-100 examples of VHDL
- 2022-06-15 19:10:07下载
- 积分:1
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CAL
基于BCD码的十进制ALU设计,可实现加减乘除的功能(BCD to decimal ALU based design can achieve the arithmetic function)
- 2013-06-30 19:49:34下载
- 积分:1
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VHDL的重要PPT资料,对初学者非常有益处
VHDL的重要PPT资料,对初学者非常有益处-VHDL important PPT information is very useful for beginners
- 2022-05-18 19:20:34下载
- 积分:1
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基于fpga的fskpsk信号产生器,可实现对1.2kHz和2.4kHz正弦波的采样...
基于fpga的fskpsk信号产生器,可实现对1.2kHz和2.4kHz正弦波的采样-based on the fpga and fskpsk signal generator,can achieve sample to the 1.2kHz and 2.4kHz sin wave
- 2023-08-25 08:15:03下载
- 积分:1
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rs232
基于 hdl语言的re232通信实验的设计,程序简单明了,一学就会(rs232 communication)
- 2012-03-26 21:41:47下载
- 积分:1
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sgiarcs
ARC firmware interface defines.
- 2015-06-27 18:50:37下载
- 积分:1
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vhdl 基于cpld的8*8点阵显示显示心型
基于CPLD的实现控制8x8点阵动态显示心型图案的程序,使用VHDL语言,通过调节分频系数可以实现点阵的变换速度,通过改变不同的状态可以让点阵显示不同的图案。
- 2023-07-21 07:55:03下载
- 积分:1
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单周期cpu
说明: 该文件包含了实现单周期cpu的全部代码以及实验报告,包括仿真波形以及烧板过程(This file contains all the codes and experimental reports of realizing single cycle CPU, including simulation waveform and download process)
- 2019-12-14 20:55:42下载
- 积分:1
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spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1