virtex7_pcie_dma

说明：  FPGA程序,使用Verilog语言生成1个脉冲可调的PPS脉冲信号。(FPGA program generates 1 PPS pulse signal, using Verilog language.)

4 seg display, button debouncer, and controller for parking meter

dos下的svga图形库，包括读bmp位图，打点划线等(svga graphics library under dos)

说明：  VHDL资料 很不错的！！！！！！！！！！！(VHDL )

Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented, and different methodologies are compared using real-world examples.

USB转RS232RSTTLRS485FT232+SP213串口的原理图AD画的(USB to RS232RSTTLRS485FT232+SP213 serial port schematic AD drawing)

数字电子钟设计完整设计，包括原理介绍，程序设计，波形仿真-Design a complete digital electronic clock design, including the principle of introduction, program design, waveform simulation

基于FPGA的verilog语言描述五子棋游戏中的棋框显示，应用VGA显示原理，用不同的颜色显示边框。以及根据棋子输入的要求，显示相应的棋子，不同的颜色显示不同的棋框和棋子

build synthesizer on a de2 dev fpga board

VHDL教程及源码,是新手入门的不二选择!-VHDL Tutorial and source code is the only option, beginners!