within waveform generator, Adder, classic dual

说明：  quartus 的一个实例,希望对刚刚学习quartus 的人有点帮助(Quartus an example, in the hope that people just learning a little help Quartus)

Comparador de magnitud

I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL

FPGA实现串口发送 Verilog 语言(Serial reception FPGA Verilog language.)

vga，显示彩条，及其简单易懂，适合初学(vga, display color bars, and its easy-to-understand, suitable for beginners)

一个数字电路设计：六层电梯自动运行的VHDL程序(a digital circuit:sixlift design)

说明：  基于FPGA的QPSK调制解调电路设计与实现 (QPSK)

自编的64B/66B编码程序，下次上传解码程序。(the 64B/66B coding process is written by myself, i will upload the decoding process next time.)

说明：  SimpleVOut (SVO) is a simple set of FPGA cores for creating video signals in various formats. The cores connect using AXI-streams. Most configurations (resolution, framerate, colordepth, etc.) are set at compile-time using Verilog parameters. See svo_defines.vh for details on those parameters.

1024点fft verilog hdl-1024-point fft verilog hdl