-
BISS
说明: biss协议源码交流 verilog hdl源码,测试可用(Biss protocol ,achieved by verilog HDL,can be verify using modelsim or other simtools.)
- 2020-12-02 09:19:26下载
- 积分:1
-
uart_byte_rx
说明: libero soc工程,实现通过串口接收到单字节数据后并返回发送给上位机(Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer)
- 2020-06-21 09:20:01下载
- 积分:1
-
8051的vhdl源代码,主要针对初学者
8051的vhdl源代码,主要针对初学者-8051 VHDL source code, mainly for beginners
- 2022-02-05 02:00:30下载
- 积分:1
-
capture-using-SCCB-and-FPGA
利用SCCB和FPGA实现视频采集的论文,对相关开发人员具有很强的参考价值!
(FPGA implementation using the SCCB and video collection of the papers, the relevant developer has a strong reference value !
)
- 2013-09-29 15:37:52下载
- 积分:1
-
FPGA
基于FPGA的FFT处理器的实现,适合做fpga的工程技术人员参考-FPGA-based realization of the FFT processor, suitable for the engineering and technical personnel fpga reference
- 2022-09-26 01:05:03下载
- 积分:1
-
基于DE2开发板的VGA显示模块,仅供大家参考
基于DE2开发板的VGA显示模块,仅供大家参考-DE2 development board based on the VGA display module, for your reference
- 2022-03-21 02:14:24下载
- 积分:1
-
Two_Port_RAM_lab
Actel双端口存储;通过串口发送数据初始化RAM,然后通过串口返回到上位机的串口调试程序显示(通过串口发送数据初始化RAM,然后通过串口返回到上位机的串口调试程序显示)
- 2009-04-03 16:20:30下载
- 积分:1
-
fir_vivado
此压缩包里面有基于vivado平台的工程,包括了正弦信号的产生,还有fir滤波器的设计以及fft算法的设计实现(in this package,there are three projects of
the generation of the signal of sin and the
design of fir filter and the ari)
- 2016-09-18 15:00:22下载
- 积分:1
-
clk_div3
基于XIlinx ISE,用Verilog语言实现3分频电路,适合初学者(Based XIlinx ISE, Verilog language using the frequency dividing circuit 3, suitable for beginners)
- 2017-04-03 23:29:15下载
- 积分:1
-
suoxianghuan
常用的锁相环技术,此程序是我在设计高频电路中运用的,具体见程序,经调试无问题(Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging)
- 2008-08-19 12:02:31下载
- 积分:1