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使用MATLAB完成CDMA系统的相关接收机,其中哈达码矩阵为128阶,仿真比特信噪比为...
使用MATLAB完成CDMA系统的相关接收机,其中哈达码矩阵为128阶,仿真比特信噪比为-10DB-CDMA system using MATLAB to complete the relevant receivers, which Hadamard matrix of 128 bands, simulation-10DB-bit signal to noise ratio for
- 2022-06-27 04:04:51下载
- 积分:1
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modelsim tutorial to learn only
modelsim教程仅供学习-modelsim tutorial to learn only
- 2022-12-19 07:25:03下载
- 积分:1
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SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps...
SPI接口的实现以及对外设的读写操作,其中包扩了几种工作方式,同时可以读取外设的版本号,传输速率可以达到2Mbps-SPI interface implementation, as well as read and write operations on the peripheral, which extended several work packages at the same time can read the version number of peripherals, transfer rate up to 2Mbps
- 2023-01-21 19:35:04下载
- 积分:1
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src
假设每个从设备中有可访问APB寄存器16个,位宽均为32比特,16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移2位(byte 偏移)(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分:1
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归档
ddr3使用教学(DDR3 using teaching)
- 2018-03-19 09:57:19下载
- 积分:1
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8_LigWater
FPGA,VHDL语言 :分频1S 8位流水灯,适用于所有FPGA芯片,VHDL源程序!!(FPGA, VHDL language: divide-1S 8 light water, and apply to all FPGA chip, VHDL source code! !)
- 2012-10-02 11:25:50下载
- 积分:1
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VHDL与源代码包
VHDL与源代码包-and VHDL source code
- 2022-02-03 22:44:25下载
- 积分:1
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buffer
用verilog实现的buffer,经过了fpga平台验证。(Implement buffer with verilog.)
- 2020-10-28 12:19:58下载
- 积分:1
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CPLD_DEMO_OK
可以给VHDL初学者看的实例,全部经过验证(VHDL beginners can see examples of all the proven)
- 2011-01-12 21:09:45下载
- 积分:1
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Verilog教程-夏宇闻
verilog 教程 PPT版本 语法 结构 设计技巧等(Verilog tutorial PPT version)
- 2018-02-26 11:13:55下载
- 积分:1