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VHDLexamples
这里面有很多的vhdl的编程的源代码,文件是全英文的,例子丰富(That there are a lot of vhdl programming source code, documentation is in English, and examples of rich)
- 2010-07-13 11:00:53下载
- 积分:1
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I2C配置tvp5150用VHDL写的
I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL
- 2023-05-02 14:30:04下载
- 积分:1
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emmc_cmd_interface_module
emmc控制芯片CMD命令线主机接口模块,(emmc control chip CMD command line host interface module)
- 2021-02-09 11:19:53下载
- 积分:1
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it performs the serail dividing operations
it performs the serail dividing operations
- 2022-11-07 21:55:03下载
- 积分:1
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Nios_II_uCOS
本源码为Nios II的开发示例,主要演示基于Nios II的uCOS的移植。开发环境QuartusII。
本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。(The source code for the Nios II development of examples, mainly based on the Nios II shows the uCOS transplant. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.)
- 2009-12-18 14:08:40下载
- 积分:1
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adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的
adc0809用FPGA控制的采样非常好用的实例 自己看书后终结的-ADC0809
- 2022-09-16 00:25:02下载
- 积分:1
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asynchronous-clock-boundary
一个关于跨越异步时钟边界传输数据的解决方案(The solution of transfering data across asynchronous clock boundary.)
- 2011-12-21 14:30:54下载
- 积分:1
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ASYNC_FIFO_SYNTH
This file contains async fifo design
- 2014-03-01 20:48:22下载
- 积分:1
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shuzishizhong
这是基于verilog hdl的数字时钟源代码,能够实现时分秒的计时,可以手动进行调时与调分。(This is based on the digital clock verilog hdl source code, can be achieved when every minute of the time, you can adjust the time manually adjusting points.)
- 2013-12-10 22:21:55下载
- 积分:1
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VHDL实现ALU的源代码,并且提供了一个详细的testbench!
VHDL实现ALU的源代码,并且提供了一个详细的testbench!-ALU VHDL source code, and provide a detailed testbench!
- 2022-03-12 21:14:39下载
- 积分:1