嵌入式应用开发技术白金手册源代码 嵌入式应用开发技术白金手源代码...

This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.

modelsim教程仅供学习-modelsim tutorial to learn only

example of BCH and RS codecs

收集的QuartusII的使用手册，包含了几个pdf文件，比较不错的参考手册-Collected QuartusII s manual contains a number of pdf files, compare a good reference manual

FPGA YCbCr444转YCbCr422实验 很好的参考(FPGA EP4CE40F23C6 YCbCr444 turn YCbCr422 experiment)

一个双向总线的vhdl实现-a two-way bus VHDL achieve

CAN VHDL Code. Behavioral implementation of CAN bus interface.

基于对ROM的编写，在quartusII上实现九九乘法器的实现，在试验箱的四个数码管上分别显示乘数，被乘数，积

说明：  基于FPGA的QPSK调制解调电路设计与实现 (QPSK)

mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过 (mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on)