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Its-GPS-ranging-codes
GPS信号结构,C/A码产生方式及其测距码研究(GPS signal structure and ranging code research)
- 2014-03-20 08:51:27下载
- 积分:1
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DE2 SOPC LCM
DE2 S O P C 用硬件语言 描述地 开发板上测试 CLM模块 实现视频传输-DE2 SOPC LCM
- 2022-07-01 11:31:51下载
- 积分:1
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1553B_enc_dec
155B航空总线中曼彻斯特编码和译码模块,亲测可以使用,而且很好用,但是对锁相环的描述不是很仔细(155B Air bus Manchester encoding and decoding modules, pro-test can be used, and it just works)
- 2020-12-04 14:49:27下载
- 积分:1
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一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码
一个基于VerilogHDL语言的16位的booth算法的乘法器及其测试代码-VerilogHDL language based on the 16-bit multiplier of the booth algorithm and test code
- 2022-02-07 12:03:36下载
- 积分:1
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Idddc_30mF
中频70M,30M带宽LFM信号,采样率为102.4M,,数字下变频后,还进行了三倍抽取,最后还得到I,Q两路信号
(IF 70M, 30M bandwidth LFM signal, the sampling rate 102.4M, under digital variable frequency after also carried out three times extracted, and finally also received the I and Q signals)
- 2012-07-25 23:56:30下载
- 积分:1
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7485比较器
mux2to1.vhd二选一电路mux2_1.vhd二选一电路mux2_1.bdf二选一电路mux3to1.vhd三选择电路mux3to1_1.vhd三选一选一个电路mux4to1.vhd 4
- 2023-03-31 09:20:04下载
- 积分:1
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基于sopc ep2c5开发板的时间标记服务例程
基于sopc ep2c5开发板的时间标记服务例程-Sopc ep2c5 development board based on the time-stamping services routines
- 2022-02-26 04:39:24下载
- 积分:1
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RTC
verilog编写的RTC(实时时钟)包含APB总线接口、时钟计时部分等(verilog prepared by the RTC (real time clock) contains APB bus interface, clock time some other)
- 2009-12-19 23:51:50下载
- 积分:1
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PS2键盘控制程序实验的内容是用EDK建一个简单的系统并加入自定义的外设(一个ps2键盘控制器)
当键盘按下时会有相应的键扫描码输出显示到PC终端...
PS2键盘控制程序实验的内容是用EDK建一个简单的系统并加入自定义的外设(一个ps2键盘控制器)
当键盘按下时会有相应的键扫描码输出显示到PC终端
-PS2 keyboard to control the content of the experimental procedure is used EDK build a simple system and add custom peripherals (a ps2 keyboard controller) when the keyboard is pressed the corresponding button will scan code to the PC terminal output shows
- 2022-03-26 18:34:50下载
- 积分:1
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Kluwer.Academic.The.Verilog.Hardware.Description
Kluwer academic the verilog hardware description language fith edition
- 2014-10-08 08:11:42下载
- 积分:1