DE2 SOPC LCM

本文提供了一种CMOS控制器，使Nios-II可以利用CMOS控制器控制CMOS，并允许在CMOS图像上传送SDRAM。在DE2-70平台上运行

电梯的设计・用来控制6层的电梯设计原来・VHDL语言-Elevator designed to control the lift design 6 original VHDL language

异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been

利用verilog HDL逐点比较法实现直线和圆弧插补(Use verilog HDL by-point comparison method to achieve linear and circular interpolation)

使用STM32官方提供的DSP库进行FFT，虽然在使用上有些不灵活（因为它是基4的FFT，所以FFT的点数必须是4^n），但其执行效率确实非常高效，看图1所示的FFT运算效率测试数据便可见一斑。该数据来自STM32 DSP库使用文档(. Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document)

基于BOOTH的32位快速乘法器的设计源码-BOOTH-based 32-bit fast multiplier design source

数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)

build a music player with nios 2

可以用于按键去抖动的电路应用，采用vhdl编写-Button can be used to jitter circuit applications, the preparation of the use of VHDL