一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的DDR控制器程序！...

Giao tiep Univesan ...

adc0809 转换，verilog代码(adc0809 conversion, verilog code)

4：2优先编码设计中的VHDL来为每个输入分配优先级。在CMOS布局1复用器：还设计了4个

Implement the 7 segment diplay on spartan 3

0-99记数VHDL的源程序,综合实验指导书上的,可以用的 大家下载哦 -0-99 notation VHDL source, comprehensive guide book on the experiment can be used by everyone to download Oh

对于已获得的脉冲包络采样序列，需测量的脉冲特征参数主要有：脉冲幅值(PA)、脉冲到达时间(TOA)和脉冲宽度(PW)。实际测量中，脉冲波形的形状是各种各样的，但其主要的参数有脉冲幅度、脉冲宽度、脉冲周期、脉冲占空比、脉冲前沿(上升时间)、脉冲后沿(下降时间)、脉冲上冲、脉冲下冲、脉冲下垂、脉冲顶部不平度等，脉冲参数的计量主要就是对这些参数进行计量。本程序包实现基于FPGA实现脉冲宽度和重复周期的测量。(Who have access to the pulse envelope sample sequence, the pulse measurement to be the main characteristic parameters are: pulse amplitude (PA), pulse time of arrival (TOA) and pulse width (PW). The actual measurement, the pulse shape is a wide variety of shapes, but its main parameters of the pulse amplitude, pulse width, pulse period, pulse duty cycle, pulse leading edge (rise time), pulse along (down time), the red pulse, pulse undershoot, pulse droop, pulse irregularities, such as at the top, the measurement of pulse parameters is mainly the measurement of these parameters. The package FPGA-based pulse width and repetition to achieve the measurement cycle.)

应用背景VHDL  ；CPU设计...................................................................................................................................................................................................................................................................................................................................................................关键技术VHDL  ；CPU设计...................................................................................................................................

verilog 键盘输入程序，用于led灯的显示-Verilog keyboard input program for led lights display

基于VHDL语言的七段显示管程序， 实现9个数字循环 并且能控制播放速度(SEVEN SEGMENT DISPLAY)

一个可以使用的RocketI/O开发实例。基于Xilinx FPGA Virtex5平台。-One can use RocketI/O development example. Based on Xilinx FPGA Virtex5 platform.