一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的DDR控制器程序！...

spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert

VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)

mux2to1.vhd二选一电路mux2_1.vhd二选一电路mux2_1.bdf二选一电路mux3to1.vhd三选择电路mux3to1_1.vhd三选一选一个电路mux4to1.vhd 4

modbus通讯必须的校验码生成器，可以直接使用(modbus crc16/8 free use)

FSM_test for textbanch in vhdl-FSM_test

交通灯电路，南北方向和东西方向分别按绿灯、黄灯、左拐灯、黄灯、红灯的顺序两灭，数码管显示相应的灯亮的时间的倒计时。已通过编译和仿真。-Traffic light circuit, north-south direction and east-west direction respectively green, yellow light, left light, yellow light, red light destroy the order of two, a digital LED display lights the corresponding period of the countdown. Has passed the compilation and simulation.

3-8译码器地简单实现，采用QUARTUSii5.0环境编译-3-8 decoder to realize a simple, using the compiler QUARTUSii5.0 environment

关于verilog的知识点和关键点的总结(Summary of knowledge points and key points of Verilog)

交通灯管理与控制系统-客户端与云网络连接并从远程位置控制的交通灯系统推导

说明：  verilog语言编写的简单FPGA 的从机模式 spi 通讯(Slave mode SPI communication of FPGA)