登录
首页 » VHDL » CPU的VHDL设计代码

CPU的VHDL设计代码

于 2022-05-20 发布 文件大小:26.04 kB
0 127
下载积分: 2 下载次数: 1

代码说明:

应用背景VHDL  ;CPU设计...................................................................................................................................................................................................................................................................................................................................................................关键技术VHDL  ;CPU设计...................................................................................................................................

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 61EDA_B95
    开发板原理图 自己可以设计开发板为什么一定要买呢(Development board schematic can design their own development board why they must buy it)
    2008-12-09 15:58:55下载
    积分:1
  • cf_ad9649_ebz_edk_14_4_2013_03_19.tar
    说明:  ad9649的fpga驱动程序,FMC接口,基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)
    2020-06-28 14:00:02下载
    积分:1
  • fsk
    基于FPGA的fsk调制程序,包括载波的生成,nco的设置(FPGA-based fsk modulation procedures, including carrier generation, nco settings)
    2016-05-12 21:00:56下载
    积分:1
  • AGC
    The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output component. For illustration purposes, the following discussion will highlight the stereo configuration.
    2017-12-01 17:26:59下载
    积分:1
  • 基于fpga和xinlinx ise的音乐播放器vhdl程序,希望对你有所帮助!...
    基于fpga和xinlinx ise的音乐播放器vhdl程序,希望对你有所帮助!-and xinlinx ideally music player VHDL process, and I hope to help you!
    2023-02-07 05:35:03下载
    积分:1
  • 基于MAX2运用Quartus实现串口通信
    基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication
    2022-04-09 03:43:20下载
    积分:1
  • A_PUF_Design
    基于fpga的物理不可克隆函数(PUF)模块的实现(A PUF Design for Secure FPGA-Based Embedded Systems)
    2014-06-28 15:37:44下载
    积分:1
  • cycloneII ep2c5 ep2c8
    cycloneII ep2c5 ep2c8
    2022-06-26 08:54:36下载
    积分:1
  • 以VHDL为第一通用代码的N位加法器
    32位加法器作为VHDL编写的第一个代码;
    2023-08-19 21:05:03下载
    积分:1
  • With VHDL Design and Implementation of the multi
    用vhdl设计实现的多功能电子钟,可有日历,闹钟,修改等多种功能-With VHDL Design and Implementation of the multi-functional electronic bell, can have a calendar, alarm clock, to amend a variety of functions such as
    2022-03-11 03:55:41下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载