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一些简单的VHDL实例,主要是介绍一些基本逻辑们及一些组合、时序电路的例子,供大家参考...
一些简单的VHDL实例,主要是介绍一些基本逻辑们及一些组合、时序电路的例子,供大家参考-Some simple examples of VHDL, mainly to introduce some basic logic and some combination of sequential circuit examples for your reference
- 2022-01-31 04:35:55下载
- 积分:1
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main
完整的GMSK调制及维特比译码,程序中包括了高斯滤波器的设计,调制相位的计算,并采用了维特比译码算法解调出原始码元,最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分:1
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SDC_RDC
基于FPGA的双通道旋转变压器测角系统硬件设计,分析的比较清楚。(FPGA based dual channel rotary transformer angle measurement system hardware design, analysis of the relatively clear.)
- 2011-08-07 20:23:10下载
- 积分:1
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Examples of VHDL language, including a variety of logic gate structure.
vhdl 语言实例,包括各种逻辑门的构造。-Examples of VHDL language, including a variety of logic gate structure.
- 2022-08-08 14:03:44下载
- 积分:1
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divider_latest.tar
floating point divider
- 2009-11-03 11:23:16下载
- 积分:1
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tcp/ip master
tcp/ip master tcp/ip master tcp/ip master tcp/ip master tcp/ip master tcp/ip master
- 2023-07-08 00:40:03下载
- 积分:1
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EMI
说明: Simetrix EMI滤波器设计,实际测试有效果。(Simetrix EMI filter design, the actual test results are effective.)
- 2019-10-01 22:28:37下载
- 积分:1
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为验证系统的Verilog设计
System Verilog for design verification
- 2022-02-11 21:30:00下载
- 积分:1
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Verilog-Files---551
Programmable IIR Filter written in Verilog and its respective modules.
- 2014-05-30 03:46:09下载
- 积分:1
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Based on the VHDL language for selecting the three sequences, you can have a cyc...
基于VHDL语言的3级序列的产生,可以循环产生周期为7的m序列
-Based on the VHDL language for selecting the three sequences, you can have a cycle for cycle 7 m sequence
- 2023-08-16 17:00:04下载
- 积分:1