Quartus flv configuration and commissioning of the

标准RS422 Verilog源代码， 传输波特率可以修改， FPGA上可以工作(Standard RS422 verilog communication source code, buardrate can be updated and it is fully work in FPGA )

155B航空总线中曼彻斯特编码和译码模块，亲测可以使用，而且很好用，但是对锁相环的描述不是很仔细(155B Air bus Manchester encoding and decoding modules, pro-test can be used, and it just works)

基于FPGA DE0以及niosII的射频无线发送程序,采用spi接口操作无线模块nrf24l01(To spi interface operation wireless module nrf24l01 of FPGA DE0, as well niosII RF wireless transmitter program)

fpga控制da产生幅值频率可调的正弦波程序(the fpga Control da produce the amplitude adjustable frequency sine wave program)

可综合的vhdl设计特点.pdf-synthesizable VHDL design features. Pdf

有用的VHDL源代码-useful VHDL source code

this is "AND" gate implementation in VHDL

利用VHDL语言实现PID控制,已经过调试验证。(Using VHDL language to implement PID control)

altera max10 USB demo，使用了phy，把开发板配置成U盘模式(altera max10 USB demo，using PHY device，design a U pan)

Implement the 7 segment diplay on spartan 3