Quartus flv configuration and commissioning of the

Advanced FPGA Design - Architecture, Implementation, and Optimization(Advanced FPGA Design- Architecture, Implementation, and Optimization)

使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制，并显示在一个8段式数码管上。-The use of Altera" s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.

说明：  该源代码包是AHB总线到Wishbone总线的交接器，包括以下4个部分：RTL源代码，测试平台，软件测试程序，说明文档。(This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.)

说明：  HDMI IP的verilog实现，vivado平台生成的IP核(Verilog implementation of HDMI IP)

Quartus环境下的7段扫描显示电路的源程序(Quartus environment of the seven scanning display circuit of the source)

ＲＳ编码在ＦＰＧＡ上实现的理论和方法，对设计ＲＳ编码很有帮助，且ＦＯＧＡ资源占有少-RS coding in the FPGA to achieve the theory and method useful for design RS encoding, and possession of less FOGA resources

该源码表述了ecc算法如何用vhdl实现RSA（Ron Rivest，Adi Shamir，Len Adleman三位天才的名字）一样，ECC（Elliptic Curves Cryptography，椭圆曲线密码编码学）也属于公开密钥算

spartan6 里使用DDR3IP核，有教程以及源码(spartan6 with ddr3,source and tutorial)

uart的vhdl实现，包含完整quartus工程文件，相信会有较大帮助-uart vhdl quartus

使用DE2实现DDS，步骤简单，配置管脚可自查看(Using DE2 to realize DDS, the steps are simple and the pins can be self-checked.)