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一个完整的
一种半加器的算法,是基于VHDL软件仿真。请大家下载参考!-A full-adder algorithm is based on the VHDL software emulation. Please download the reference!
- 2022-04-16 00:29:23下载
- 积分:1
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根据音乐发生的机理,将复杂可编程逻辑器件作为发生音乐的核心器件,用高速集成电路硬件描述语言编程描述发生的音乐乐谱,配合周边硬件电路,由电声转换发声器接收信号,从...
根据音乐发生的机理,将复杂可编程逻辑器件作为发生音乐的核心器件,用高速集成电路硬件描述语言编程描述发生的音乐乐谱,配合周边硬件电路,由电声转换发声器接收信号,从而发出音乐声,实验表明,采用该方法设计的音乐发生器成本低、修改方便-Music took place in accordance with the mechanism of complex programmable logic device, as occurred in the core of music devices, with high-speed integrated circuit hardware description language to describe the occurrence of music notation, with the peripheral hardware circuits, electro-acoustic conversion by the audible signal device to receive signals, which issued music, experiments show that this method of music generator design and low cost, easy to amend
- 2023-06-27 23:25:04下载
- 积分:1
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spi_test
说明: 基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)
- 2020-06-20 21:00:01下载
- 积分:1
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verilog实现的“并行输入、并行输出移位寄存器”
verilog实现的“并行输入、并行输出移位寄存器”-verilog to achieve a " parallel input, parallel output shift register"
- 2023-06-06 17:30:03下载
- 积分:1
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基于VHDL的I2C程序0002,很不错的论文及程序,,大家快下啊
基于VHDL的I2C程序0002,很不错的论文及程序,,大家快下啊-based on the I2C procedures VHDL 0002, a very good paper and procedures, we quickly under ah
- 2022-03-24 23:26:37下载
- 积分:1
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编译实现循环码的产生,用FOR循环分别对其中的码元进行设置。...
编译实现循环码的产生,用FOR循环分别对其中的码元进行设置。-Implementation cycle of the compiler generated code, respectively, using FOR Cycle one of the key element of the set.
- 2022-08-11 07:55:45下载
- 积分:1
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suijitu
matlab随即图设计程序,应该比较有用,希望能申请会员成功吧。。(matlab then drawing design program)
- 2013-04-25 10:49:07下载
- 积分:1
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DCT_IDCT
DCT and Idct with vhdl and verilog
- 2017-11-22 17:15:12下载
- 积分:1
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Nexys-4-DDR-XADC
Nexys-4-DDR-XADC 开发板demo(Nexys-4-DDR-XADC e.v. Board demo)
- 2018-12-07 15:33:22下载
- 积分:1
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4X4键盘密码比较模块,可以查看密码6
4X4 KEYPAD 的密码比较模块,可以核对6位的密码-4x4 KEYPAD password comparison module, can check the password 6
- 2022-10-12 19:30:03下载
- 积分:1