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UML_2_Pour_les_bases_de_donnees
UML2 apprendre a modeliser a l aide de UML
- 2014-02-25 01:32:23下载
- 积分:1
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ssi_tx
VHDL同步串口发送部分,基于Xilinx ISE的编程平台(synchronous serial port sending part on VHDL)
- 2021-01-18 20:08:43下载
- 积分:1
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fpq
介绍了基于VHDL的可编程分频器在波形发生器中的应用的方法,利用这一方法,
可使波形频率在大范围内变化。()
- 2007-07-24 15:46:43下载
- 积分:1
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multiplier
32位乘以32位乘法器,由datapath 和控制中心组成,输出64位结果(32bits by 32 bits multiplier
)
- 2012-03-26 11:55:39下载
- 积分:1
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src
说明: 假设每个从设备中有可访问APB寄存器16个,位宽均为32比特,16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移2位(byte 偏移)(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分:1
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interpolator
说明: 插值滤波器,用于音频解码调制解调,滤波器系数用移位相加实现(Interpolation filter, audio decoder for modulation and demodulation, filter coefficient shift combined with the realization of)
- 2008-10-21 12:49:38下载
- 积分:1
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report
说明: report for a report for a class
- 2019-04-17 21:19:15下载
- 积分:1
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去抖动状态机,外部按键转换状态,同时可去抖动
去抖动状态机,外部按键转换状态,同时可去抖动-To shake state machine, the external key conversion state, while to the jitter
- 2022-02-07 09:04:28下载
- 积分:1
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galois
example of BCH and RS codecs
- 2009-06-10 11:26:17下载
- 积分:1
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LCD12864
verilog lcd2864 适合初学者(verilog lcd2864 )
- 2013-10-15 18:57:45下载
- 积分:1