VHDL的您的信息的一个游戏程序的源代码，我希望那些在…

VHDL之二進制轉BCD碼之程式碼，算完整的(Of binary to BCD code VHDL code, operator complete)

用Verilog实现汉明码编码，经测试可正确使用，代码简洁(Verilog with Hamming code encoding, the test can be used correctly, the code is simple)

许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等(many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.)

说明：  一维超混沌随机数的生成verilg，还有testbench仿真激励，modelsim的仿真工程。(The generation of one-dimensional hyperchaotic random number verilg, testbench simulation stimulation and Modelsim simulation engineering.)

时钟在单片机中的应用，用于控制中断及显示程序(Clock in the MCU application, used to control interrupt and display program)

Altera官网上关于SOPC中自定义组件（PWM）的实例，官网上现在没了。。可很多书上都在用-Altera in the official line on the SOPC custom component (PWM) of the examples are not the official line. . Can be a lot of books are in use. . .

利用FPGA内核产生SPWM波，并且频率可调(The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable)

用VHDL编写简单的直流电机控制方法.供大家参考.-use VHDL to prepare a simple DC motor control methods. For your reference.

FPGA-CPLD实习计数器7段数码管控制接口设计与LED显示控制，FPGA译码(FPGA-CPLD internship counter 7-segment LED control interface design and LED display control, FPGA decoder)

说明：  实现AXI,AXI-Lite乒乓地址的传输，AXI,AXI-Lite已经封装成内核，可直接修改后使用(Realize the transmission of table tennis address of Axi and Axi Lite. Axi and Axi Lite have been encapsulated into a kernel, which can be directly modified and used)