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ser_par
24bitAD数据采样进行串并转换,并行输出。另包括24位DA并串转换,串行输出。(24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.)
- 2009-12-10 15:46:54下载
- 积分:1
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sourceinsight的verilog插件
sourceinsight的verilog插件-The Verilog sourceinsight plug-ins
- 2022-02-04 18:20:59下载
- 积分:1
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用例化语句和case语句编写的全加器的VHDL描述。
用例化语句和case语句编写的全加器的VHDL描述。-Of statements were prepared using the full adder of the VHDL description.
- 2022-01-26 02:45:15下载
- 积分:1
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FPGA RAND 生成伪随机数
FPGA生成伪随机数,希望对加密的童鞋有用(FPGA generates pseudo-random numbers, we want to be useful)
- 2013-08-05 16:43:55下载
- 积分:1
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Verilog代码。注册成功,对FPGA的使用标准单元库…
verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
- 2022-04-14 16:29:39下载
- 积分:1
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自适应均衡器
自适应均衡器
- 2022-07-13 15:30:18下载
- 积分:1
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vhdl,序列信号检测模块,此模块检测1110010,可改为任意序列,输出电位为1为检测出,否则为0...
vhdl,序列信号检测模块,此模块检测1110010,可改为任意序列,输出电位为1为检测出,否则为0-vhdl, sequence of signal detection module, this module testing 1.11001 million, can be changed to an arbitrary sequence, the output potential of an as detected, otherwise 0
- 2022-10-12 22:25:03下载
- 积分:1
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realization of the project document ARM system CPLD logic, external resources ha...
该工程文件实现ARM系统中CPLD的逻辑工作,起到外围资源的逻辑地址译码功能-realization of the project document ARM system CPLD logic, external resources have address decoding logic function
- 2022-02-05 23:05:52下载
- 积分:1
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6
说明: 4位数码扫描显示电路,我们控制一个七段LED需要8个输出端口;如果要输出四位十进制数,就需要32的输出端口,这将占用大量的端口资源。采用串行扫描显示,我们只需要8+4共12个端口即可。其原理是:用一个四位的输出端控制,某一时刻只选中其中的一个LED(输出为‘1’表示选中),八位的输出端将该LED所需要显示的值输出;然后四位的输出端值改变,选中下一个LED。这样依次类推。如果选择的频率很快,达到50Hz以上,由于人眼的视觉暂留效应,看起来就像4个LED同时显示。
设计一个程序,输入四个一位十进制数,用4个LED显示出来。CLK采用频率可调信号发生器,逐渐改变频率,观察扫描频率的改变对输出效果的影响。
输入:连续脉冲,逻辑开关;输出:七段LED。
(4 digital scanning display circuit, we need to control a seven-segment LED output port 8 If you want to output four decimal numbers, you need the output port 32, which will take up a lot of ports. Serial scans showed, we need only 8 of 12 ports can be+4. The principle is: the output of four with a control, a time to select only one LED (output 1 is selected), 8 output of the LED by the need to show the value of the output then The output value of the four changes, select the next LED. This and so on. If you select the frequency rapidly, reaching more than 50Hz, as the human eye s persistence of vision effect, looks like a 4 LED display simultaneously.
Design a program, enter a decimal number four, with four LED display. CLK signal generator with adjustable frequency, gradually changing the frequency of observed changes in scan frequency effect on the output.
Input: Continuous pulse, logic switches output: seven-segment LED.)
- 2010-06-21 22:07:59下载
- 积分:1
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add_noisem
把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92,其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等,在信号处理中往往需要把库中的噪声叠加到信号中去,而噪声的采样频率与纯信号的采样频率往往不一致,需要采样频率的校准。
(The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)
- 2012-08-10 14:18:33下载
- 积分:1