附件 介绍了如何 使用compxlib命令编译Xilinx的ModelSim仿真库，创建这个仿真库对ISE调用modelsim是必不可少的一步,该法完全自动化，...

在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)

basys3的数字钟，可以显示00.00-59.59(Digital clock of basys3,It can display 00.00-59.59)

FPGA开发仿真工具modelsim的高级进阶教程，包括如何写脚本文件和后台批处理文件(FPGA Development Advanced simulation tools modelsim tutorial, including how to write a script file and back-office batch file)

FPGA 12864显示程序 VHDL程序！！(FPGA 12864 show program )

这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.-This is a control chip cpld 1394 Verilog the procedures, they can refer to the actual project has been adopted.

fir filter 程序 老师上课留的作业，在这里跟大家分享一下，希望能有所帮助(fir filter procedures teacher in the class to stay the operation here to share with you, hope can be helped)

GMSK基带信号的调制解调基于SIMULINK的系统，计算误码率，(Modulation and Demodulation of GMSK Baseband Signal)

circuit design with VHDL e-book MIT Press....

this ebook for electronics hobbiest. VHDL for Beginners

verilog延时电路的不同写法，和综合能否。可对比学习(Different wording verilog delay circuit, and comprehensive ability. Comparable learning)