ripple adder

FPGA设计流程指南 介绍基本的设计方法-FPGA Design Process Manual

键盘扫描，实现4×4键盘扫描功能，实现在数码管上显示相应的数字-Keyboard scanning, the realization of 4 × 4 keyboard scan function, the realization of digital tube display in the corresponding figure

verilog 232串口收发程序 在开发板上测试成功过-verilog 232 serial port transceiver program already had some success in the development of on-board test ^ ^

熟悉IIC协议总线协议，采用IIC总线对图像采集传感器寄存器进行配置，并转换为RGB565格式。 利用异步FIFO完成从摄像头输出端到SDRAM 和SDRAM 到VGA 接口各跨时钟域信号的传输和处理。 利用 SDRAM 接口模块的设计，实现了刷新、读写等操作；为提高SDRAM 的读写带宽，均采用突发连续读写数据方式；并采用乒乓操作实现 CMOS 摄像头与VGA的帧率匹配。 利用双线性插值方法实现对图像640×480到1024×768的放大操作。 完成VGA显示接口设计。(Familiar with IIC protocol bus protocol, IIC bus is used to configure the register of image acquisition sensor and convert it into RGB565 format. Asynchronous FIFO is used to transmit and process signals across clock domain from camera output to SDRAM and SDRAM to VGA interface. With the design of SDRAM interface module, refresh, read and write operations are realized. In order to improve the read and write bandwidth of SDRAM, burst continuous read and write data mode is adopted, and table tennis operation is used to achieve frame rate matching between CMOS camera and VGA. The bilinear interpolation method is used to enlarge the image from 640*480 to 1024*768. Complete the VGA display interface design.)

LCD Interface_Xilinx.CPLD源码参考设计(LCD Interface Xilinx CPLD)

5分代码及说明，verilog代码，几乎所有的IC面试都会问到这个问题，所以总结了一下发了上来，共同学习！-5 pm code and explanations verilog code Almost all the interviews will IC asked this question, summed up in the ranks about fat, learn together!

电机控制中PWM波产生的程序，VHDL语言实现-Motor Control PWM wave generated by the procedure, VHDL language

用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate

基于FPGA的数字钟的设计，外部时钟32MHz，通过分频器得到秒脉冲，用于正常工作时的计数脉冲。通过分频还得到一个5ms的脉冲，用于按键的消抖（具体原理可见程序）。输入的信号有三个：1.时钟信号2.校时模式设置按键3.校时调整按键，输出通道6位数码管。共有：校时模块，24计数的小时计数模块，60计数的分钟计数模块，60计数的秒钟计数模块。

采用Verilog HDL设计，在Altera EP1S10S780C6开发板上实现 选取6MHz为基准频率，演奏的是梁祝乐曲 - Uses Verilog the HDL design, development board realizes in Altera on the EP1S10S780C6 selects 6MHz is the datum frequency, the performance is Liang wishes the music