ALTERA　NIOS处理器实验，编程环境是QUARTUS，在NIOS SHELL下编译实现功能。实验USB接口...

Description of a sistolic arhictecture for a FFT implementation in FPGA.

The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last

huffman transform in vhdl language

自己编写的，浮点数与整数之间的转换的Verilog HDL实现(Written by myself, it is converted into Verilog HDL integer floating point implementation)

华为内部资料，关于FPGA设计的详细过程介绍，很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。(Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.)

说明：  用FPGA于32进行SPI单向通信，FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)

说明：  用verilog语言开发俄罗斯方块小游戏(Developing Tetris game with Verilog language)

以上是VHDL硬件描述语言写的一个简单锝路流水灯程序,希望对刚接触VHDL的朋友有一定帮助-These are the VHDL hardware description language written in a simple flow path lights technetium procedures,刚接触VHDL want to have some friends to help

软件开发环境：ISE 7.1i 仿真环境：ModelSim SE 6.0 1. 多功能数字钟(Software development environment: ISE 7.1i simulation environment: ModelSim SE 6.0 1. Multi-function digital clock)

说明：  基于FPGA的Veilog HDL实现代码，简单明了，希望能帮助verilog的初学者……(ＤＤＳ　based on Verilog ＤＨＬ for FPGA　)