-
DTMB
能够完美产生数字地面电视(DTMB)的信源的程序。帧头模式为模式一。信道可选择,信号加入频偏,延时,后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)
- 2013-07-25 11:22:28下载
- 积分:1
-
fir.tar
FIR滤波器的VHDL语言实现(The implement of FIR Filter based on VHDL)
- 2004-10-19 10:14:56下载
- 积分:1
-
sync-and-asyn_FIFO_verilog
同步与异步FIFO的verilog实现,包括源代码,testbench,测试以及综合通过,还有相关参考资料(Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references)
- 2021-03-07 14:19:29下载
- 积分:1
-
nco11000
实现输入一正弦波和噪声的叠加,介绍详细欢迎下载(The input of a superposition of sine wave and noise introduced in detail)
- 2010-05-16 14:19:53下载
- 积分:1
-
234
在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下
变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所
采用的高效滤波器———CIC 滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink 对数字
下变频的性能进行了仿真。在仿真的基础上使用Insight 公司的FPGA 开发系统,用测试电路实测了
数字下变频的性(In the receiving digital signal, softening the realization, the digital down-conversion plays an important role. This article first introduced the digital down conversion of the composition, and then a detailed analysis of digital down conversion of the working principle described in the realization of digital down conversion, the design used in high-performance filters--- CIC filters and multi-phase extraction filter structure and principle. Finally, with the adoption of Simulink for digital down-conversion performance of the simulation. In the simulation based on the use of Insight s FPGA development system is measured using the test circuit of the digital down-conversion of)
- 2021-03-16 21:29:21下载
- 积分:1
-
OQPSK
说明: 这是一个关于dQPSK的Matlab程序
这是一个关于dQPSK的Matlab程序 (This is a dQPSK the Matlab program This is a dQPSK the Matlab program)
- 2010-04-21 12:46:25下载
- 积分:1
-
and VHDL source code
VHDL与源代码包-and VHDL source code
- 2022-07-21 05:42:10下载
- 积分:1
-
c语言编写51单片机键盘扫描程序,方便移植到其他的硬件上去...
c语言编写51单片机键盘扫描程序,方便移植到其他的硬件上去-51 Singlechip c language keyboard scanning procedures for transplantation to other hardware up
- 2023-09-08 23:40:03下载
- 积分:1
-
making a simple clock using altera vhdl
making a simple clock using altera vhdl
- 2022-04-16 21:53:47下载
- 积分:1
-
用VHDL语言编写的写存储器程序,可下载在FPGA中使用
用VHDL语言编写的写存储器程序,可下载在FPGA中使用-VHDL language used to write memory program can be downloaded in the FPGA using
- 2022-06-17 11:46:31下载
- 积分:1