用VHDL语言编写的写存储器程序，可下载在FPGA中使用

This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing

基于FPGA的等精度数字频率计，包含FPGA和单片机通信程序，解释非常详细。经过调试成功。(FPGA-based Precision Digital frequency meter, including FPGA and MCU communication program, explained in great detail. After successful commissioning.)

基于FPGA的数字低通滤波器 。。。。。(FPGA-based digital low-pass filter。。。。。)

to learn bout development of vhdl code

说明：  100个vhdl例子，对初学者很有用，可以用MAX+PLUS 2来编译仿真的(100 vhdl example, useful for beginners, you can use the MAX+ PLUS 2 to compile the simulation)

考研复试口语，适合计算机专业考研复试口语专业课(Traditional Interview spoken, spoken for Specialized Computer Traditional Interview)

说明：  URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)

This is counter with T_FF.

假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块-the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module