在 FPGA 中实现 SPI 接口

说明：  FPGA 读写 SRAM 存储块，verilog代码(Read and write SRAM memory block and Verilog code in FPGA)

VHDL控制VGA 在显示器上显示图形，分辨率800X600，晶振50Mhz-VGA control with VHDL

利用VHDL语言设计一个分频器，输入为CLK,输出分别为CLK1、CLK8、CLK256、 CLK1024-The use of VHDL language design a divider, input CLK, the output respectively, CLK1, CLK8, CLK256, CLK1024

本程序是在Quartus7.2环境下编译的一个简单的(2,1,3)卷积码，能够成功地编译和仿真。(This procedure is in circumstances Quartus7.2 compile a simple (2,1,3) convolutional code, can successfully compile and simulation.)

in this code very useful for designing real number concept

usb控制器，有VHDL实现的，还有C++的源码，可以编译-usb controller, there is the realization of VHDL, as well as C++ source code can be compiled

VIVADO HLS IMAGE 使用文档(vivado image processing example text of zynq)

VHDL黄金参考手册，能让你更好的学习了解VHDL语言(VHDL gold reference manual, can make you a better learn VHDL language)

四选一编程语言，可以自动生成四选一器件。-First elected four programming languages, you can automatically generate a four selected devices.

VHDL语言编程简单实例若干，适合于初学者(VHDL language programming simple example, suitable for beginners)