北大verilog课件，数字集成电路设计入门，从HDL到版图

说明：  KMP算法的Verilog HDL实现，模式串从模块的外部输入，计算next函数，然后进行KMP匹配。有仿真。环境为Quartus II 8.0 Web Edition。(Verilog HDL implementation KMP algorithm, pattern string from the module' s external input, calculate next function, then KMP matching. A simulation. Environment for the Quartus II 8.0 Web Edition.)

code for kcpcm3 : Describes the working of KCPCM3 embedded in picoblaze xilinx-code for kcpcm3 : Describes the working of KCPCM3 embedded in picoblaze xilinx

VHDL的重要PPT资料,对初学者非常有益处-VHDL important PPT information is very useful for beginners

RS[255,223]纠错码verilog源码，包含编码和解码模块，以及testbench等。(Verilog source code for RS[255,223] encoder and decoder, with testbench included.)

初学verilog HDL时 找的好资料 大家共享-Beginners should try to find a good share information

report for a report for a class

PS2键盘LCD显示控制器的vhdl代码，很难得(PS2LCDController vhdl code)

double edfe trigger d latch

VHDL_COUNTING 0_9_LED 7 段 (ĐẾM 0 ĐẾN 9 HIỂN THỊ LED 7 ĐOẠN BẰNG NGÔN NGỮ VHDL)

EDA应用中ROM具体定义实例，供大家学习和写程序参考之用-EDA applications, examples of the specific definition of ROM, for everyone to learn and write programs for reference