随机数发生器

VHDL handbook is very nice and suitable guide to HVDL language

本程序为24小时计时器，稳定无误差。简单好用，是Verilog HDL语言初学者的指引。-This procedure for 24-hour timer, stable error-free. Easy-to-use, is the Verilog HDL language beginners guide.

VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料-VHDL hardware description language and digital logic circuit design, VHDL learning good information

VHDL硬件描述语言与数字逻辑电路设计-VHDL hardware description language and digital logic circuit design

这是一个基于可编程逻辑器件的程序，用来实现自动转换量程频率计控制器，该程序在可以再仿真器上仿真实现-This is a programmable logic device based on the procedures used to automatically convert the frequency range of the controller, the program can be in the simulation simulator

vhdl编程语言电子书，英文的，有很多例子(VHDL programming language e-books, in English, there are many examples of)

Vhdl Golden Reference Guide.pdf

一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code

library of protues aaaaaaaa

mooor状态机的VHDL程序，代码，状态机，关键是分析各个状态之间的切换-mooor zhuangtaiji zhuagtaiji guanjianshi gege zhuangtai zhijian de qiehuan