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xapp1161
多相滤波系统的设计与实现,有MATLAB仿真程序,有sysgen的系统仿真,还有VHDL代码,其中还有FIR的系数参数等等(Polyphase filter system, the design and implementation includes a MATLAB simulation program, sysgen system simulation, and VHDL code, including FIR coefficient parameters, and so on
)
- 2021-02-15 17:29:47下载
- 积分:1
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UART
说明: 基于FPGA设计的串口发送及接收程序,波特率可调(FPGA - based serial port sending and receiving)
- 2020-06-18 23:20:01下载
- 积分:1
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verilog motor control
verilog motor control
- 2022-09-01 04:55:02下载
- 积分:1
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wp_max_flash
FPGA中FLASH配置控制源码,VHDL和Verilog(FPGA source code in the FLASH configuration control, VHDL and Verilog)
- 2007-12-11 15:57:15下载
- 积分:1
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vhdl,双向移位寄存器,实现置数,左移及右移操作
vhdl,双向移位寄存器,实现置数,左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation
- 2022-07-14 16:53:32下载
- 积分:1
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sopcAD7352nios
基于sopc的7352的ad模块的nios软核多通道编写,verilog 写的(The sopc 7352 AD module nios soft core multichannel write. Rar
)
- 2012-11-03 21:37:42下载
- 积分:1
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liushuideng
使用430的四系点亮流水灯,内置有时钟函数,函数简单,值得一看(The four lines using 430 lit water lights, built-in clock function, the function is simple, eye-catcher)
- 2013-08-31 15:23:06下载
- 积分:1
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these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2022-01-26 00:53:26下载
- 积分:1
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MSK_BER
msk比特误码率matlab仿真 匹配滤波器(the msk bit error rate matlab simulation matched filter)
- 2020-11-14 11:49:42下载
- 积分:1
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55593402DDS_vhdl
DDS分频实现,全部代码的完整过程,包括截图等(DDS divider to achieve the complete process of all the code)
- 2013-05-15 16:49:55下载
- 积分:1