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procedures in the report, with QuartusII operations, the attention to word from...
程序在报告中,要 用QuartusII运行,注意从word到运行环境中,可能有个别符号不兼容,重新在运行环境中输入那些符号就可以了-procedures in the report, with QuartusII operations, the attention to word from the operating environment, Some individual symbols are not compatible, the operating environment to re-enter those symbols on the
- 2022-03-22 23:49:36下载
- 积分:1
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ALTERA_FPGA_SDRAM
使用ALTERA的FPGA控制SDRAM的verilog程序(Use ALTERA s FPGA to control SDRAM s verilog program)
- 2017-03-30 00:31:53下载
- 积分:1
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一些简单的VHDL实例,主要是介绍一些基本逻辑们及一些组合、时序电路的例子,供大家参考...
一些简单的VHDL实例,主要是介绍一些基本逻辑们及一些组合、时序电路的例子,供大家参考-Some simple examples of VHDL, mainly to introduce some basic logic and some combination of sequential circuit examples for your reference
- 2022-01-31 04:35:55下载
- 积分:1
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vivado2019d1license
说明: vivado的license ,可以用在2019.1,2019.2,在win10 64bit上已检验过.(It can used in vivado2019.1,2019.2)
- 2020-03-21 17:15:21下载
- 积分:1
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verilog
说明: i2c module,有i2c主机和从机模块(i2c module verilog VHDL base on i2c protocol)
- 2020-10-26 08:27:29下载
- 积分:1
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入门,verilog语言,实现字符型液晶1602的显示,及按键控制
入门,verilog语言,实现字符型液晶1602的显示,及按键控制-verilog
- 2022-07-19 01:27:34下载
- 积分:1
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pid-vhdl
基于vhdl的pid控制器设计,可以用quartus等软件实现。数字控制系统pid设计源代码。(Pid controller based on VHDL design, can use the quartus software implementation, etc. Digital pid control system design of source co)
- 2014-05-12 21:15:37下载
- 积分:1
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fdivision
在quartus平台下,并使用verillog hdl编写的时钟分频仿真(In quartus platform and use verillog hdl write clock divider simulation)
- 2016-08-15 07:45:12下载
- 积分:1
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UART to send the complete procedure, including the complete source code of nucle...
UART的完整发送程序,包括完整的工程核源代码。-UART to send the complete procedure, including the complete source code of nuclear engineering.
- 2022-01-28 15:16:09下载
- 积分:1
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verilog to write a telephone billing program
verilog 写的 电话计费器程序-verilog to write a telephone billing program
- 2023-01-29 16:55:03下载
- 积分:1