三星K9F2G08flash读写擦出

verilog code for counter four

Viterbi译码器的编解码器的设计 用Verilog实现-Viterbi decoder。Verilog

初学ＶＨＤＬ有用的，了解后对复杂设计有很大帮助．-VHDL beginner useful understanding of the complexity of the design has been inspired by them.

用VERILOG实现自动售货机功能，运行正确，希望有帮助(Use VERILOG implementation vending machine function, correct operation, hope to have help)

TI F28027 SCI 源码，中断，FIFO，LoopBack使能(TI F28027 SCI source code, interrupt, FIFO and Loopback enalbe)

模拟SDH帧结构，设计了状态机，能从连续传输的SDH字节流中找出帧头；从SDH字节流中，提取E2字节，并按照64K速率分别串行输出E2码流及时钟；设计了输入信号，输出包括E2串行数据、E2串行时钟和SDH帧头位置指示

（1）距离算法研究和设计； （2）采用FPGA/CPLD实现。 -(1) distance algorithm and design (2) using FPGA/CPLD implementation.

常用的锁相环技术，此程序是我在设计高频电路中运用的，具体见程序，经调试无问题-Commonly used phase-locked loop technology, this program is in the design I used in high-frequency circuits, see the specific procedures, no problem by debugging

class diagram diagram for AIRS

浮点数 矩阵乘法模块 verilog语言编写 可直接调用(Floating-point matrix multiplication module can directly call verilog language)