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iic
iic 总线 verilog 源代码
标准i2c总线, 有sda scl 时钟,频率自定(IIC bus standard Verilog source code i2c bus, has sda scl clock, the frequency of self-)
- 2007-10-24 17:52:33下载
- 积分:1
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High
高性能FPGA应用领域及其研究,FPGA的开发流程-High-performance FPGA applications and research, FPGA development flow
- 2022-09-28 01:00:04下载
- 积分:1
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DE2_WEB_QII_60
ALTERA官方板子DE2官方代码,芯片是EP2C35F672C6N(ALTERA official board DE2 official code, the chip is EP2C35F672C6N)
- 2017-09-07 19:35:35下载
- 积分:1
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sata3.0协议及FPGA各模块实现
说明: sata3.0协议及FPGA各模块实现,有代码及文档说明。(Sata3.0 protocol and FPGA module implementation, with code and documentation.)
- 2020-02-13 01:02:31下载
- 积分:1
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Altera公司的DE2平台的VGA接口的应用程序,从上到下KEY0
ALTERA的DE2平台VGA接口应用,由KEY0-KEY3控制上下左右,使屏幕上光标移动,由Verilog描述。-ALTERA the DE2 platform VGA interface applications, from top to bottom KEY0-KEY3 about control, so that the screen cursor by the Verilog description.
- 2022-09-28 16:00:04下载
- 积分:1
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jiaotongdeng
运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)
- 2011-06-06 16:26:55下载
- 积分:1
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AD9826
AD9826中文说明书 ,对于学习AD9826元件有很大的帮助。(AD9826 Discription in Chinese)
- 2015-04-12 14:22:34下载
- 积分:1
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gps
基于fpga和dsp架构的gps接收机的设计和实现(Design and Implementation of gps Receiver Based on fpga)
- 2017-05-25 17:44:51下载
- 积分:1
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PipelineSim
一个计算机原理课程设计的作业,5级流水线CPU,指令集到代码均为自己设计,有最终报告文档,组建说明,并行除法,16位字长,定长指令,Verilog源代码,顶层设计图。结构简单,冲突解决方式也很简单,代码量小。(A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.)
- 2012-06-24 22:19:14下载
- 积分:1
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WigglerJTAG
Wiggler Clone .JTAG Schematic and PCB in Altium Designer Format
- 2009-07-17 19:27:27下载
- 积分:1