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pn_gen_vhd_211
通信中常用的PN序列产生器的源代码全部打包(Communications commonly used in PN sequence generator, the source code of all packaged)
- 2009-02-04 15:41:17下载
- 积分:1
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AD9957
ad9957的资料,内含有命令字生成器,适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)
- 2011-10-27 22:06:55下载
- 积分:1
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iq_balance
调整iq幅度不平衡的模块,可以解决载漏和边带问题。(Iq amplitude imbalance adjustment module can be resolved carrier and sideband leakage problems.)
- 2021-04-23 17:48:47下载
- 积分:1
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DDC_Ver1.0
数字下变频(DDC)在如今基于软件无线电的架构中对系统的整体性能决定性的影响,代码为基于Matlab的4通道DDC程序,程序中可以根据需要调节滤波器等参数评估DDC的性能对于使用FPGA实现DDC有较大的参考价值(Digital down conversion (DDC) in today' s architecture based on software radio system a decisive impact on the overall performance of the code for the 4-channel DDC Matlab-based program, the program can be adjusted according to filter parameters such as the use of performance assessment FPGA DDC DDC has achieved great reference value)
- 2010-08-04 18:33:14下载
- 积分:1
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SASX
Use of Kalman and EKF on two-phase permanent magnet synchronous motor of the state estimate CDCDCDCDCCC
- 2020-06-24 11:40:02下载
- 积分:1
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xintf-fpga
本程序主要是实现xinlinx fpga与dsp之间的双工通信(This program is to achieve duplex communication between xilinx fpga and dsp)
- 2021-02-10 18:29:52下载
- 积分:1
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uart-for-fpga
Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA.
Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit!
The UART controller was simulated and tested in hardware.
- 2020-06-24 22:00:02下载
- 积分:1
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rams
combinatorial modules
- 2019-04-13 19:41:21下载
- 积分:1
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clock_6
说明: ds1302时钟驱动程序,已在quartus上验证可以是直接使用(DS1302 clock driver, which has been verified on quartus, can be used directly)
- 2020-06-24 12:00:02下载
- 积分:1
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OFDM信道估计的LS算法的FPGA实现
本程序用于实现OFDM信道估计的LS算法的硬件仿真,基于FPGA开发的VHDL编写,给出了各模块的仿真波形图,供大家交流参考。
- 2023-02-25 09:55:04下载
- 积分:1