固定的点复杂 FFT

说明：  64位数据的CRC-32校验的，Verilog实现，算法并行优化(64-bit data CRC-32 checksum, Verilog implementation of a parallel optimization algorithm)

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

用Verilog描述了一款简单逻辑芯片74HC595的功能该芯片功能为：带输出锁存的8位移位寄存器(use the verilog to describe a simple chip 74HC595 with 8-Bit Serial-In, Parallel-Out Shift Reg and High-Current 3-State Outputs Reg)

说明：  SDRAM硬件控制,fpga的verilog语言，适合学习(SDRAM hardware control, Verilog language of FPGA, suitable for learning)

半带滤波器verilog源代码，主要用于采样率变换系统中，采用乘法积累加器，很好的例子，供大家参考(Half band filter verilog code, mainly for the sampling rate conversion system, use the multiplication accumulation adder, a good example, for your reference)

VHDL ip core的设计，软核的设计方法-VHDL core of the design, soft-core design

code for fft non synthesisable in xilinx ise

verilog编程语言的讲解，有电子科技大学出版(verilog programming language to explain, there is the University of Electronic Science and Technology Publishing)

XC95144步进电机驱动器源码,采用verilog vhdl开发,个人原创-XC95144 stepper motor drive source, using verilog vhdl development, personal originality

这是基于Quartus2 开发环境和verilog hdl语言写的38译码器(This is based development environment and Quartus2 verilog hdl language used to write decoder 38)