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74-Hamming-code-encoder-and-decoder
基于VHDL实现(7,4)汉明码的编码器和译码器(VHDL-based implementation (7,4) Hamming code encoder and decoder)
- 2011-06-09 20:47:07下载
- 积分:1
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Tuart_tx_rxh
该工程用verilog编写,已通过串口调试助手调试通过,接收模块采采用8倍波特率采样数据,有较好的滤波功能,在PC上完成自发自收功能。
(The project is written in verilog debugging through serial debugging assistant, adopted 8 times the baud rate sampling data receiver module, better filtering done on the PC spontaneous self-closing function.)
- 2012-08-26 10:39:49下载
- 积分:1
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EX12
说明: 这是一个用Verilog语言编写的一组程序,主要是熟悉开发板的应用,以及verilog语言(This is a Verilog language with a set of procedures, mainly familiar with the application development board, and the verilog language)
- 2011-03-03 09:38:38下载
- 积分:1
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sep_fram_v0.0
直接序列扩频系统的收发系统,可以进行参数配置(this is a Verilog program )
- 2016-03-01 13:22:03下载
- 积分:1
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官方的RS232例程详细Altera非常实用
altera 官方rs232例程 很详细很实用-official rs232 routines in great detail altera very practical
- 2023-04-15 09:15:03下载
- 积分:1
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vhdljiaochengCDROM
《VHDL程序设计教程》光盘使用说明
本光盘是邢建平和曾繁太所著《VHDL程序设计教程》一书的配书光盘。本光盘的著作权归作者所有。
清华大学出版社享有该光盘的中文简体版专有出版权。
本光盘包括如下目录:
“e_teaching_vhdl”--CAI教学材料
包含全套的PowerPoint文件,可以直接用于教学,具体请参见该目录中的index.pps文件说明。
共包含前言、第一章到第六章的教学文件。目前包含的为中文版辅助材料。
“vhdl fortextboot”--教程代码
包含本书教程例子的所有代码。
“vhdl for lab”--教程实验部分代码
包含本书教程实验部分所有代码。
“vhdl solutions”--教程习题参考解答
包含本书教程习题参考解答的文档。
“class music”--课间休息音乐欣赏
包含课间休息的中外音乐欣赏。
("VHDL Programming Guide" CD-ROM for use
This disc is too SENSORS and Tseng Fan book "VHDL Programming Guide," a book with the book CD. Of the copyright of the CD-ROM of all.
Tsinghua University Press entitled The Simplified Chinese version of the CD exclusive copyright.
This CD includes the following directories:
"E_teaching_vhdl"- CAI teaching materials
Contains the full set of PowerPoint files can be directly used in teaching, specifically refer to the directory index.pps documentation.
Contains a total of introduction, the first chapter to the sixth chapter of the teaching file. Currently contained in the supplementary material for the Chinese version.
"Vhdl fortextboot"- Tutorial code
Tutorial examples include all of the code book.
"Vhdl for lab"- Tutorial test sections of code
Experimental part of the tutorial contains all the code book.
"Vhdl solutions"- solutions for reference Tutorial exercises
Reference bo)
- 2010-11-29 14:25:51下载
- 积分:1
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GW48
vhdl语言试验箱GW48的各种模式引脚图。。(vhdl language the various modes of chamber GW48 pin map. .)
- 2010-01-20 13:20:28下载
- 积分:1
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适用于FPGA的SOPC方面的程序开发方面,可以用于添加COMPENENT
适用于FPGA的SOPC方面的程序开发方面,可以用于添加COMPENENT-Applicable to FPGA-SOPC procedures development, can be used to add COMPENENT
- 2022-03-01 05:39:53下载
- 积分:1
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5-15
用verilog语言实现基于DDS技术的余弦信号发生器,其输出位宽为16比特(Verilog language cosine signal generator based on DDS technology, the output bit width is 16 bits)
- 2013-04-18 22:58:05下载
- 积分:1
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all clock
说明: 数字钟通过verilog实现,并且支持Modelsim仿真(The digital clock is implemented by Verilog and supports Modelsim simulation)
- 2020-06-18 05:00:01下载
- 积分:1