altera 公司的15IP源码 亲自测试还不错 有DIV, CONTER

Verilog HDL 数字设计与综合，夏宇闻译。本书重点关注如何应用verilog语言进行数字电路和系统的设计和验证，不仅讲解语法，更从基本概念讲起，逐渐过渡到编程语言接口以及逻辑综合等高级主题。(The design and synthesis of Verilog HDL digital, Xia Wen translation. The book focused on how to apply the verilog language for the design and verification of digital circuits and systems, not only explain the grammar, the more I start from the basic concept, and a gradual transition to advanced topics such as programming language interface and logic synthesis.)

verilog code for dma

USB+FPGA电路设计原理图，实际的电路板运行正常，很有参考意义。-usb_sch

基于CPLD器件的线型CCD东芝TCD1501的驱动程序，用verilog语言开发。(CPLD devices based on linear CCD driver Toshiba TCD1501 using Verilog language development.)

pngenerator的vhdl代码。我们可以在cdma的fpga实现中使用它；

xilinx 平台的SPI从接口实现源码，供参考学习(used xilinx,slave-spi interface.)

VEROLOG的重要PPT资料,对初学者非常有益处-PPT important VEROLOG information is very useful for beginners

FPGA，VHDL语言 ：分频1S 8位流水灯，适用于所有FPGA芯片，VHDL源程序！！(FPGA, VHDL language: divide-1S 8 light water, and apply to all FPGA chip, VHDL source code! !)

这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章，实用性很强的，在这里也感谢这篇文章的作着-This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was

verilog实现UART收发功能，硬件平台为spartan 6，软件平台为ise14.7(verilog implement UART rx and tx function)