一个快速和简单的斯巴达教程3

Arty Z7 20 HDMI output

cache，实现了部分简单指令，仿真模拟确认可行(Single-cycle CPU, to achieve some simple instruction, simulation confirm feasible)

使用Verilog实现的AD采样，很有用的！(Implemented using Verilog AD sampling, very useful!)

FPGA Implementation ofLow Power 64-Point Radix-4 FFT Processor for OFDM System

Ovo sto saljem je tutorijal 7 sa vhdlom

Circular_Buffer，流水线型多位缓存器，verilog语言描述。通过modelsim 6。0仿真，quartus 综合通过。-Circular_Buffer, type a number of buffer lines, verilog language description. Through modelsim 6. 0 simulation, quartus integrated through.

INTEL 微处理器 第八版 答案 从第二章开始，奇数偶数的答案都有。(INTEL microprocessor eighth edition answer from the beginning of the second chapter, the answer has odd and even.)

用verilog语言写的简单的键盘扫描代码，适合初学者，用alter的软件编写的程序代码。(Using verilog language to write simple keyboard scan code, suitable for beginners, with alter software program written code.)

mimo—ofdm线性卷积，实现输入的800位宽的数据同两个序列的卷积(Mimo- ofdm linear convolution 800 bits wide input data with the convolution of two sequences )

用verilog实现了一个数字秒表的设计-verilog achieved using a digital stopwatch Design