对视频编解码芯片ADV7181进行合理的配置，使其输出符合ITUR656标准的视频流...

说明：  APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境(APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment)

周立功sopc教程的视频资料，适合广大自学者学习-ZLG sopc video tutorial is suitable for the general self-learners to learn

本程序为捷变频信号的verilog源代码设计实现的仿真，并含有相应捷变频信号在MATLAB仿真的结果(The procedure for the Czech Republic converted signal verilog source code design and implementation of the simulation, and the Czech Republic frequency signal containing the corresponding simulation results in MATLAB)

MAX+plus II编译的模30加法计数器，简单的与非门组成！-MAX+ Plus II compiler module adder 30 counters, a simple composition with the non-door!

两位独立数码管100进制计数器，每1秒计数一次。从0到99，到99后又回到0.-Two independent 100-band digital tube counters, every time 1 seconds count. From 0 to 99, to 99 and then back to 0.

用fpga实现SDI，每一步都很清楚 搞视频的可以参考(Fpga realization of SDI, each step are clearly engaged in the video can refer to)

实现fpga 读写flash 在k7上验证(Realization of FPGA read-write flash verification on K7)

CODE_VHDL_COUNTING 电路时钟运动显示期间 LED 7 （MẠCH ĐẾM ĐỒNG HỒ THỂ 邵族 HIỂN THỊ 领导 7 ĐOẠN）

基于Xilinx Vertex2的可综合的2048x10位的读写可控制FIFO模块源代码，深度可控(Based on the Xilinx Vertex2 can be integrated 2048x10-bit read and write can control the FIFO module source code, the depth of controllable)

I2C温度传感器ADT75的控制源码 使用verilog 状态机实现 易入门-I2C for ADT75 temperature sensor