-
OFDM-based-on-FPGA
用FPGA实现OFDM系统,硬件语言为Verilog,环境为xilinx,详细介绍了接收机和发射机各个模块的源代码(OFDM system with a FPGA implementation, hardware language Verilog, environment xilinx, details of receiver and transmitter modules source code)
- 2015-05-11 08:58:13下载
- 积分:1
-
SPI_test
说明: 用FPGA于32进行SPI单向通信,FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)
- 2020-06-18 10:40:02下载
- 积分:1
-
ANALYSIS-OF-ALL-GATES
ANALYSIS OF ALL GATESS
- 2013-11-12 13:33:55下载
- 积分:1
-
DE2 development company for the altera board SD_Card_Audio examples
用于altera公司DE2开发板上SD_Card_Audio的实例-DE2 development company for the altera board SD_Card_Audio examples
- 2022-12-25 12:55:03下载
- 积分:1
-
北斗定位系统卫星下行信号的基带处理部BDSSS-Transmie
北斗定位系统卫星下行信号的基带处理部分——基于FPGA的的直接序列扩频发射机的设计与仿真。,已通过测试。
(Beidou positioning system satellite downlink signal baseband part- based on the design and simulation of the FPGA direct sequence spread spectrum transmitter. , Has been tested.)
- 2012-10-04 00:05:36下载
- 积分:1
-
vhdl的基础性的介绍,对初学者大有用处
vhdl的基础性的介绍,对初学者大有用处-vhdl basic introduction
- 2022-05-20 01:22:09下载
- 积分:1
-
chengxu
设计制作一个可容纳4组参赛者的数字智力抢答器,每组设置一个抢答按键;
电路具有一第一抢答信号的鉴别和锁存的功能。在主持人将系统复位并发出抢答指令后,若参加者按抢答键,则该组指示灯亮并用组别显示抢答者的组别。此时,电路具有自锁功能,使别组的抢答开关不起作用。
设置计分电路。每组在开始时预置成6分,抢答后主持人计分,答对一次加1分。(The design can accommodate a the Entrants digital intellectual Responder, each set answer in a key circuit has a first answer in the signal to identify and latch functions. Host to the system reset and sent the answer in instruction, participants answer in key, the group of the group light and display the answer in the group. At this point, the circuit has a self-locking function does not work in other groups to answer switch. Set Scoring circuit. Preset six points each at the beginning of the answer in scoring after the host, answer time, add 1 point.)
- 2012-06-10 12:58:44下载
- 积分:1
-
花了两周我们已经做出了一些改变,Altera DE1,DE2 PS2的IP
花了半个月才改好的Atera DE1/DE2 ps2 IP 驱动核。放在FPGA工程目录下可以直接使用。本IP能够驱动PS/2键盘和鼠标。使用时只要调用HAL目录下的文件即可以直接使用!-Spent a good two weeks we have made some changes Atera DE1/DE2 ps2 IP-driven nuclear. On the FPGA project directory can be used directly. The IP to drive PS/2 keyboard and mouse. When used as long as the call HAL directory file that can be used directly!
- 2023-07-13 20:25:03下载
- 积分:1
-
卡内基梅陇大学verilog课程讲义-unlocked
说明: verilog讲义
卡内基梅陇大学verilog课程讲义-unlocked
卡内基梅陇大学verilog课程讲义-unlocked(Verilog Course Lectures at Carnegie Mellon, University Verilog Course Lectures at Carnegie Mellon University Verilog Course Lectures at Carnegie Mellon University)
- 2020-06-20 18:00:02下载
- 积分:1
-
quartusii 三分频电路,大家帮参考一下,有什么问题
quartusii 三分频电路,大家帮参考一下,有什么问题-one-third of quartusii frequency circuit, refer to U.S. help, have any problem
- 2022-03-17 05:41:25下载
- 积分:1