8251的完整的功能的实现,可以进行编译,综合.

simple code based on verilog shifter , cla ,clg , ALU , PC

用于FPGA的huffman算法的HDL编码，包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。(The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.)

可以产生8比特的采样波形，非常不错的VHDL程序(Sampling can produce 8-bit waveform, very good VHDL program)

说明：  Implementation of CORDIC atan block in VHDL

crc-16的编码，使用的多项式是G(x)=x^16+x^12+x^5+1(generator polynomial of degree 16: G(X)=x^16+x^12+x^5+1)

一位加法全加器，可以实现低位进位输入和高位进位输出。(full adder)

自己写的 AXI master code(AXI master code)

SOPC基于MATLAB与DSP Builder设计技术 实验使用说明，非常详细，易于上手(dsp builder)

采用Verilog HDL设计,在掌宇智能开发板上得到实现 根据抢答器的原理，整个电路可划分为三部分：采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on the palm space intelligence development board to snatch the answering principle, the entire electric circuit may divide is three parts: The sampling electric circuit, the gate control the electric circuit and the decoding circuit

很好的学习FPGA嵌入式的资料！适合初学者和工程师参考！(Good learning FPGA embedded information! Suitable for beginners and engineers reference!)