8251的完整的功能的实现,可以进行编译,综合.

VHDL Handbook by HARDI Electronics AB

用VHDL实现60秒倒计时的功能 倒计时为0时蜂鸣器持续响起(Continued sounded to achieve 60 seconds of the countdown function with VHDL countdown to the 0:00 buzzer)

VHDL 洗衣机程序，可实现定时、报警、洗衣，脱水等等功能。底层为VHDL文件，顶层为电路图连接

crc校验,经验证正确,下载就可直接用,有不足的地方可以指正,-CRC check, certified correct, you can download directly, there are deficiencies can correct me,

这是我自己写的两个8位二进制数的乘法程序，在xilinx Spartan3E 上已经调试成功，拿出来与大家分享！-that I wrote two eight binary number multiplication procedure, In xilinx Spartan3E debugging has been successful, with the show to share with you!

KDP晶体二倍频与三倍频；基于耦合波方程组；已于实验结果校核 (Sum Frequency in KDP)

数字钟通过verilog实现，并且支持Modelsim仿真，通过实验验证(The digital clock is implemented by Verilog and supports Modelsim simulation)

ADI JESD204接口的ADC与Xilinx FPGA接口IP，包含Verilog和VHDL源代码，AXI总线接口，ADC串行控制接口(ADI IP for interfacing JESD204 ADC to Xilinx FPGA, include Verilog/VHDL source code, AXI interface and serial config interface )

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

AD9268的配置Verilog实现，程序用于实现4通道的AD9268的配置(The 4 channel AD9268 configuration)