OFDM信道估计的LS算法的FPGA实现

a big number class and a calculator using the class

verilog hdl教程135例:verilog hdl语言类似于C语言，便于学习。本文档带有源代码，11-12章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code 11-10-12 Cap

Commponent for drivering EEPROM memory AT25320 from Avalon bus.

ACO-OFDM sdakldjas seuekdsjakdnskd

用verilog语言编写的步进电机加减速控制算法，可选择梯形曲线或S型曲线算法(Verilog language stepper motor acceleration and deceleration control algorithm, you can choose the trapezoidal curve or S-curve algorithm)

Frequency meter Verilog implementation for Xilinx XC2C256. MT10T7 7-seg LCD used for output.

基于小波变换去噪，采用了vhdl编写，已经在和matlab上对比过，结果准确，而且大量的节约了时间，欢迎下载，可以在quartusii中查看RTL电路，可以在modesim中仿真出结果

运用vhdl程序设计语言进行ppm设计，ppm 设计在vhdl语言中非常常用，运用已经越来越广泛。-use vhdl program design language ppm design, vhdl ppm design in a very common language, has become increasingly widespread use.

Verilog使用automatic function的範例(Verilog example of the use of the automatic function)

一路24位计数器,cpu可直接读写计数器的计数值.-All the way 24-bit counters, cpu can be directly read and write the total value counters.