这是一个基于VHDL语言编程的电子琴源代码程序，希望可以帮到大家...

pll(phase locked loop) is used to fix the circuit to particular frequency

8位有符号编码的整数基改性

自己收集的VHDL例程代码，适合初学者学习用，希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.

0-99记数VHDL的源程序,综合实验指导书上的,可以用的 大家下载哦 -0-99 notation VHDL source, comprehensive guide book on the experiment can be used by everyone to download Oh

说明：  DDS VHDL include everything of dds AD9914

vc707 board ucf xdc files

实现了简单的电子表功能，是24小时，用VHDL所编写的，quartus ii 7.2-To achieve a simple spreadsheet functions, is 24 hours, using VHDL prepared, quartus ii 7.2

程序在报告中，要　用QuartusII运行，注意从word到运行环境中，可能有个别符号不兼容，重新在运行环境中输入那些符号就可以了-procedures in the report, with QuartusII operations, the attention to word from the operating environment, Some individual symbols are not compatible, the operating environment to re-enter those symbols on the

ad9361 matlab驱动代码，运行此代码可在matlab中控制AD9361(AD9361 matlab driver code, running this code can control AD9361 in MATLAB)

verilog lcd2864 适合初学者(verilog lcd2864 )