Simulation using VHDL language songs Andy Lau

SOPC基于MATLAB与DSP Builder设计技术 实验使用说明，非常详细，易于上手(dsp builder)

本程序是fpga控制flash的读写程序，包括了程序和仿真时的测试文件(fpga flash)

在quaters下写的比较数的大小输出，verilog语言写的，具有状态机和存储器-Written in the quaters of the size of the comparator output, verilog language written with the state machine and memory

This document gives the code for programming a CC2500 transceiver using Altera Stratix FPGA. The FPGA and CC2500 are connected through SPI mode with the FPGA as the master and CC2500 as the slave.

此两文件是在MAXplusII环境下开发并运行通过的VHDL文件，实现了并串口转换功能。-this document is in two MAXplusII environment through the development and operation of the VHDL documents, and the realization of serial conversion function.

功能：基于VHDL语言，实现对高速A/D器件TLC5510控制-Features: Based on the VHDL language, realize high-speed A/D control devices TLC5510

FPGA实验，实现了蜂鸣器发出不同的音调，利用按键，很好玩的-FPGA experiment, realized the buzzer sounded a different tone, the use of keys, it is fun

国外经典verilog代码，很适合初学者，其中的有些概念对老手也可以考虑下-Foreign classic Verilog code, it is suitable for beginners, of which some of the concept of a veteran may also want to consider under the

This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 ADC and generates SPI_CLK and SPI_nCS of it and reads 12-bit serial data ADC and returns 12-bit parallel data.

lattice的串口仿真的程序- serial port simulated programme of lattice