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本文介绍了使用verilog语言进行硬件设计的一些基本技巧-This paper describes the use of Verilog hardware design language, the basic skills

基于matlab的BOC仿真程序，包含BOSK调制等。(Based on the matlab the BOC simulation program, contains modulation BOSK.)

说明：  document qpsk vhdl code

基于FPGA实现的神经网络算法ANN。针对手势识别，不错的参考文章。(Hand Postures Recognition System Using Artificial Neural Networks Implemented in FPGA)

cordic算法的vhdl实现，内附有文档说明-cordic algorithm vhdl realized, a document containing a note

verilog实现基于i2s协议接口，在fpga上验证通过。(Verilog implements the interface based on I2S protocol and verifies it on fpga.)

xilinx ise开发环境中fft IP核调用，仿真(Xilinx ise development environment FFT IP core call, simulation)

一个关于VERILOG与VHDL混合编程，混合验证的资料(A hybrid programming on VERILOG and VHDL, mixed verification data)

使用verilog硬件设计语言在FPGA板子上STOPWATCH 秒表设计。(Using verilog hardware design language STOPWATCH stopwatch design on FPGA board.)

vhdl语言主要描述语句的说明和使用方法，内附例子可供学习提高-VHDL language description of the main description of statements and the use of methods, containing examples for learning improve