RS232 communication protocol with the VHDL language, based on the Altium Designe...

利用电话远程系统，通过密码验证来实现对家庭电器的智能控制。-The use of long-distance telephone system, via a password to verify the implementation of the intelligent control of household electrical appliances.

最大最小值寻找程序，可以实现自动查找最大值与最小值(min_max_finder)

System Verilog decodificator. Enters a value(binary), drops hundreds, tens and units in BCD

基于COMTEX-M3的IEEE1588,irigB对时的源程序，包括GPS对时程序，并将对时的结果写入FPGA中(Based COMTEX-M3 of IEEE1588, irigB on time source, including GPS for the program, and writes the results when the FPGA)

数字钟的VHDL语言程序，包含了好几个模块，是毕业设计的优秀程序，值得下载！(VHDL language program of digital clock, contains several modules, is an excellent program, graduation design is worth to download!)

It s Flicker_LED code.Verilog for MaxV.

说明：  计算机组成原理实验多时钟周期CPU设计，包含VHDL代码的设计，实验电路图，实验详细截图。(Computer component experiments designed more CPU clock cycles, including VHDL code design, test circuit, test detailed screenshots.)

说明：  反应力测试 利用图片的变换根据用户点击的反应时间判断(Reaction force measurement using the picture of the transformation reaction time based on user clicks judgment)

说明：  难得的soc设计用的ddr3 verilog，可用于学习！！！！！有datasheet ，可仿真(soc ddr3 verilog for study !!)

实现基于FPGA的vga显示，亲测能编译得过，不同开发版应该要相应改动（PS: 不太了解）