此文件给出了一个多功能交通灯的VHDL代码实现，可作为电赛的准备材料...

这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.(This is a control chip cpld 1394 Verilog the procedures, they can refer to the actual project has been adopted.)

EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计(EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design)

Verilog代码实现Sobel算子，包括整个工程，仿真也有。。仿真表明该程序能实现Sobel 算子硬件实现(Verilog，Sobel Operator)

若农场路无车辆，则在高速路保持绿灯。在探测农场路有车辆，高速路上的交通灯应由绿到黄，再到红，并允许农场路方向灯变绿，绿灯亮一段时间，由绿变黄再到红。(If there is no vehicle on the farm road, keep the green light on the highway. There are vehicles on the farm road, the traffic lights on the high speed road should be green to yellow, and then red, and allow the farm road lights to turn green, the green light for a period of time, from green to yellow, then to red.)

异步fifo实现，通过双口ram实现异步fifo(Asynchronous FIFO implementation, through dual port RAM to achieve asynchronous FIFO)

一个FIR低通滤波器,最小阻带衰减-30db,带内波动小于1db．用MAXPLUS2设计与仿真。-This is a FIR LPF, with-30dB in stop-band and sigma is less than 1dB. It is designed and simulated on MAXPLUS2.

file_read vhdl code provide by my teacher for reading file into FSM-file_read vhdl code

本程序是fpga控制flash的读写程序，包括了程序和仿真时的测试文件(fpga flash)

FSK模拟信号源，利用ISE7.1或以上环境打开。(FSK signal simulator.The project can be open in ISE7.1 or upgrade version.)

用VHDL编写的8259控制,供大家使用.-with VHDL control of the preparation of the 8259, for your use.