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Tft good reference is listed, eight general
很好的tft参考实列,通用的8位并口,非常快移值-Tft good reference is listed, eight general-purpose parallel port, very fast shift value
- 2022-03-19 11:01:47下载
- 积分:1
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061110061
在quartus平台下使用verilog语言编程实现简单的单流水线CPU,可以执行16条基本指令(Quartus platform in the verilog language programming using a simple single-line CPU, can perform 16 basic instructions)
- 2010-05-21 20:01:16下载
- 积分:1
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mini_cpu_verilog
用verilog写的简单的CPU,有详细注释(Use verilog to write a simple CPU, with detailed notes)
- 2011-07-16 09:20:27下载
- 积分:1
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fftip
2008-2009年优秀硕士论文之:基于FPGA的高性能32位浮点FFT IP核的开发(Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development)
- 2010-12-09 19:31:46下载
- 积分:1
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I2C Bus Controller ALTERA the VHDL source code
I2C总线控制器 altera提供的VHDL的源程序代码-I2C Bus Controller ALTERA the VHDL source code
- 2022-01-25 15:11:56下载
- 积分:1
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a cycle ruduandency code
实现一个循环冗余码,是老师给的例子,别的同学已经验证-a cycle ruduandency code
- 2023-04-27 23:30:03下载
- 积分:1
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ConvolutionWithViterbiDecoding
QPSK调制下的(5,7)卷积码的编码和维特比译码与BPSK调制下(5,7)卷积码的编码和维特比译码的BER特性(QPSK modulation under (5,7) convolutional code encoding and Viterbi decoding and BPSK modulation (5,7) convolutional code encoding and Viterbi BER characteristic)
- 2020-12-12 20:09:15下载
- 积分:1
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VHDL_to_UART
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。()
- 2007-08-09 09:54:40下载
- 积分:1
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Tri-Eth
采用xilinx三太以太网ip核,tri-mode MAC完成千兆以太网数据传输(Too Ethernet using xilinx ip three nuclear, tri-mode MAC Gigabit Ethernet data transmission is completed)
- 2014-03-06 22:00:43下载
- 积分:1
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RISC
说明: URISC的RTL级设计,Verilog代码(Design: URISC RTL Verilog)
- 2019-06-16 23:07:39下载
- 积分:1