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0720_03_AD_uart
基于fpga的verilog实现ad及uart,并进行仿真验证(Verilog based on FPGA implements AD and uart, and carries out simulation verification)
- 2019-01-21 20:52:46下载
- 积分:1
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Rs232_Trans
controller for sending serial data at different speeds
- 2009-04-28 02:41:14下载
- 积分:1
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实验九 计算机核心(CPU+RAM)的设计与实现
计算机组成原理的CPU实验,基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)
- 2018-06-09 11:13:43下载
- 积分:1
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ISA.System.Architecture
ISA总线资料《ISA System Architecture》(ISA System Architecture)
- 2009-10-28 20:46:39下载
- 积分:1
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laplace
说明: Laplace可以应用于图像的锐化,根据其原理,对于Laplace后的图像同样可以进行边缘检测。(Laplace can be applied to image sharpening. According to its principle, edge detection can also be performed for images after Laplace.)
- 2020-07-15 18:28:50下载
- 积分:1
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three_motor
matlab仿真MATLAB电机仿真精华50例--源代码异步电机\asymotor_stator.mdl
- 2010-01-16 22:02:43下载
- 积分:1
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demo_as32ttl1w
可以获取各种字符,并在数码管显示出来,非常的靠谱且稳定(Various characters can be acquired and displayed on the digital tube.)
- 2020-06-16 15:00:02下载
- 积分:1
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VHDL_to_UART
用VHDL编写的串口通讯程序,包括几个不同的程序例子,也可以用verilog进行改写。()
- 2007-08-09 09:54:40下载
- 积分:1
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3。这个核心的分配必须是免费的。充电
3. Distribution of this core must be free of charge. Charging is -- allowed only for value added services. Value added services -- would include copying fees, modifications, customizations, and -- inclusion in other products.-3. Distribution of this core must be free of charge. Charging is-- allowed only for value added services. Value added services-- would include copying fees, modifications, customizations, and-- inclusion in other products.
- 2022-01-31 13:42:46下载
- 积分:1
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pulse_change
用vhdl实现脉冲宽度可控的一简单程序 仿真环境MAXPLUS-(use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-)
- 2005-07-24 11:53:57下载
- 积分:1