a code to display in VGA using VHDL lang

说明：  this describes building spi block on verilog hdl and programming them on an fpga device

ofdm系统的matlab实现，包括插入导频信号和循环前缀(Matlab implementation of ofdm system, including inserted pilot frequency signal and the cyclic prefix)

Wishbone dma ip core

IT IS THE DP MEMORY MODULE. IT CONTROLS THE DP MEMORY

cpld/fpga RS(204,188)译码器的verilog程序-cpld/fpga RS (204,188) decoder of the Verilog program

针对京微雅阁的CME300 FPGA教程，里面有几个例程，并附有源代码，初学者可尽快入门。(For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.)

Xilinx FPGA using leftover multipliers and block RAM

VHDL同步串口发送部分，基于Xilinx ISE的编程平台(synchronous serial port sending part on VHDL)

AMBA总线规范，能对从事嵌入式的同行们有一些帮助，让大家更好的理解ARM 结构和AMBA 体系(AMBA Specification)

基于FPGA编写一个时间显示，计数功能，年月显示的程序，(FPGA-based preparation of a time display, counting, years show program,)