自己编写的经过QuartusII验证的Verilog HDL程序，可以实现常见功能...

基于FPGA的出租车计价器，欢迎大死同学多多交流(FPGA-based Taximeter, welcomes the dead students more exchanges)

VHDL语言编程简单实例若干，适合于初学者(VHDL language programming simple example, suitable for beginners)

16b20b encoder and decoder

说明：  载波同步是QPSK信号相干解调的一项关键技术。(Carrier synchronization signal coherent QPSK demodulation is a key technology.)

这是一个计算器的Verilog代码，可实现加减乘除等基础功能(calcultor for you to do some reserches.)

VHDL语言实现VGA的显示彩条横条九宫格的功能。(VGA display color of the VHDL language bar Jiugongge function.)

Enhanced Audio Project by Dixie Xue & Wei Zhang -Enhanced Audio Project by Dixie Xue & Wei Zhang

用verilog编写的网卡芯片rtl级。前仿后仿都通过了，可以在modelsim上运行察看-verilogrtl After the former imitation through imitation, it can run on the look modelsim

自适应滤波，对输入信号进行选择性的加权处理，使输出达到最优化，并且能够跟踪和适应系统和环境的动态变化(Least mean square，of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)

这个是专门用在ALtera第二代PLD MAXII上的16位微处理器IP核，文档齐全-this is the ALtera devoted second-generation PLD MAXII on the 16-bit microprocessor IP core, complete documentation