自己编写的经过QuartusII验证的Verilog HDL程序，可以实现常见功能...

VLSI based question set

rs422标准通讯模块 异步收发 verilog语言编写(rs422 standard communication module asynchronous receiver verilog language)

图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写(Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language)

OFDM系统新型CC编解码的verilogHDL设计，与RS编码级联，经测试误码率性能提高(OFDM system verilogHDL new CC codec design, coding and RS cascade, tested BER performance improvement)

标准的异步串口通讯设计程序――基于VHDL编程-communication design programme of standard asynchronous serial port base on VHDL programme

本例是关于卷积码的一个简单算法，用verilog HDL语言编写，整个文档包括了产生卷积的整个工程。-In this case is a convolutional code on a simple algorithm, using verilog HDL language, the entire document, including the method of deconvolution of the whole project.

基于VHDL可编程BPSk调制教学~~~十分好用`~容易学会-VHDL-based programmable BPSk modulation of teaching is very good ~ ~ ~ `~ easy to learn to

原理图和程序，都已经调试好了！可以直接使用！

I2C接口标准建模源码,I2C interface standard modeling source-I2C interface standard modeling source

说明：  从github下载的，能够参考设计AXI4的协议接口(AXI4 Verilog template)