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ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

该程序实现最小频移键控信号的调制解调，经测试无误。(The program implements minimum shift keying signal modulation and demodulation, tested and correct.)

Xilinx公司网站下的SDRAM Controller的参考设计，经过验证-Xilinx website of SDRAM Controller reference design, validated

基于FPGA的波束形成，包括ad转换，数据存储等部分。。(FPGA-based beamforming, including ad conversion, data storage and other parts. .)

VHDL实现简单的8位CPU doc文件上有源代码-VHDL simple eight CPU doc documents Active code

该代码为配合7号信令模块MK50H27的cpld(xilinx 95144)的逻辑代码,其中包括了VHDL及原理图.-the code to meet on the 7th of signaling modules MK50H27 cpld (Xilinx 95144 ) logic code, which included a schematic and VHDL.

一种基于FPGA 实现DDDR SDRAM的控制器 (DDDR SDRAM controller based on FPGA)

使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)

说明：  AD6 中进行FPGA设计与仿真，很不错的资料哦(FPGA design and Simulation in AD6, very good data)

adc0809 转换，verilog代码(adc0809 conversion, verilog code)