Tcd1500c 时序代码

Implement the 7 segment diplay on spartan 3

designing of 16 bit adder using 4 bit adder using verilog code

SDRAM基础性控制核 很有用的 VHDL状态机实现-SDRAM control of the nuclear basic useful VHDL state machine implementation

说明：  一种能简单的实现I2C通讯的代码，对于主机和从机之间的通讯讲解的很清楚。(A Code for I2C Communication)

Actel双端口存储；通过串口发送数据初始化RAM，然后通过串口返回到上位机的串口调试程序显示(通过串口发送数据初始化RAM，然后通过串口返回到上位机的串口调试程序显示)

利用verilog驱动LCD1602 本实验是用LCD1602显示英文。（LCD带字库）(//Use verilog driver LCD1602// video tutorial for all of us 21EDA e-learning board// The experiment is LCD1602 display in English. (LCD with font))

yong VerilogHDL yu yan bianxie de pinlv fa sheng qi,shi yong ISE ruan jian da kai.-Used VerilogHDL to make a frequency builder.

VerilogHDL.自动增益控制模块中产生控制电压的部分-VerilogHDL. Automatic Gain Control Module have some control voltage

用Verilog语言实现汉明编码，很粗燥，是大三的时候做的(With the Verilog language Hamming code, it is rough dry, a junior at the time to do)