用VerilogHDL进行频率生成器。

135个经典VerilogHDL源码和说明文档，入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry

altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim 验证，文件中包含TESTBENCH ，直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available

说明：  combinatorial modules

实现mimo-ofdm系统的交织功能，可供参考(Implement the mixed function of mimo- ofdm system, available for reference)

qpsk的fpga实现，包含调制和解调部分，使用verilog语言(FPGA implementation of QPSK)

verilog 驱动TLC5510代码，TLC5510是高速的AD，可达20MHz(verilog code driven TLC5510, TLC5510 is a high-speed AD, up to 20MHz)

USB3.0开发板资料，采用CYUSB3.0(USB3.0 development board, using CYUSB3.0)

说明：  30 bus for atp design

ＶＨＤＬ编写的flash控制器源代码.包含testbench。-Prepared by flash controller VHDL source code. Contains testbench.

ADC7606的驱动代码，采用verilog实现(ADC7606 driver code, using Verilog to achieve)