登录
首页 » VHDL » Traffice LED Controller base on FSM

Traffice LED Controller base on FSM

于 2022-09-04 发布 文件大小:251.81 kB
0 128
下载积分: 2 下载次数: 1

代码说明:

Traffice LED Controller base on FSM 1. for crossroad, each road with 3 led: green, red, yellow. 2. only use one counter.

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Verilog-
    VHDL的基本语法,应用,建模,编程示例等...(Introduction to VHDL basic syntax, applications, modeling, programming example and so on ...)
    2012-03-13 19:59:29下载
    积分:1
  • Farrow-filter-design
    两篇中文论文,详细叙述了Farrow滤波器的设计方式和理论基础,非常实用!(Two Chinese papers, described in detail Farrow filter design methods and theoretical foundation, very useful!)
    2013-11-15 17:15:20下载
    积分:1
  • This tutorial presents some basic concepts that can be helpful in debugging of a...
    This tutorial presents some basic concepts that can be helpful in debugging of application programs written in the Nios II assembly language, which run on Altera’s DE2 boards.
    2022-08-19 12:45:10下载
    积分:1
  • walkthrough1
    switching the lights debouncing , toggle
    2010-02-10 03:07:08下载
    积分:1
  • bcd_to_dec
    VHDL code for converting BCD to Decimal
    2018-02-13 09:45:16下载
    积分:1
  • 基于FPGA的数字钟设计
    基于FPGA的数字钟的设计,外部时钟32MHz,通过分频器得到秒脉冲,用于正常工作时的计数脉冲。通过分频还得到一个5ms的脉冲,用于按键的消抖(具体原理可见程序)。输入的信号有三个:1.时钟信号2.校时模式设置按键3.校时调整按键,输出通道6位数码管。共有:校时模块,24计数的小时计数模块,60计数的分钟计数模块,60计数的秒钟计数模块。
    2022-04-01 05:03:17下载
    积分:1
  • AES 128 Crypto Core
    Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in single core.
    2023-01-28 07:05:04下载
    积分:1
  • CY7C68013A_board_test
    该资料基于FPGA实现USB2.0的高速传输,即CY7C68013A芯片的数据传输,包括FPGA与上位机之间数据的相互传输,CY7C68013A的传输速率最高可达480M/S。(The FPGA-based high-speed data transmission USB2.0, that CY7C68013A chip data transmission, including the mutual transmission of data between the FPGA and the host machine CY7C68013A transfer rate up to 480M/S.)
    2020-08-24 21:48:15下载
    积分:1
  • 一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用
    一个用VHDL语言编写的双端口存储器程序,可下载在FPGA中使用-Written in VHDL language using a dual-port memory program can be downloaded in the FPGA using
    2023-06-18 05:20:03下载
    积分:1
  • Subway_VHDL
    模拟地铁自动售票机选票、付款、取票、找零等功能,包含软件仿真和硬件响应,可供仿真测试和FPGA验证。(Analog subway ticket vending machine ballots, payment, tickets, give change and other features, including software simulation and hardware response for simulation and FPGA verification test.)
    2016-03-14 10:44:14下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载