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XUAN-ZHUAN-led
旋转LED 实现自适应转速 字幕滚动 对接的程序(Rotating LED Adaptive Speed subtitles scroll docking program)
- 2013-02-06 16:17:56下载
- 积分:1
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UDP
用verilog实现的UDP协议,包括arp,udp,ip分段协议等,对于想用FPGA实现TCP/IP协议的人来说,应该会起到一定的帮助作用(Implemented with verilog UDP protocols, including arp, udp, ip fragmentation protocol, etc., who want to achieve TCP/IP protocol with the FPGA people, should play a helpful role)
- 2021-04-05 04:39:03下载
- 积分:1
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AD9226
一个AD9226芯片的驱动,用FPGA写的。虽然简单,但是希望对各位有帮助(An AD9226 chip driver, FPGA written. Though simple, but I hope you will help)
- 2013-09-05 01:47:36下载
- 积分:1
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this project is based on jk and t flip flop using vhdl.this is the 100 correct...
this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
-this project is based on jk and t flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering.
Here dataflow techniques and behavioural techniques are used.
- 2022-03-24 10:20:34下载
- 积分:1
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FSK
2FSK的matlab仿真,叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)
- 2021-04-13 02:58:56下载
- 积分:1
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clock
Quartus II软件设计数字电子钟,使用verilog语言编写各个
模块生成symbol files,再用原理图方式制作顶层文件。
完成的功能有:能够显示时、分、秒;具有清零,调节分钟的功能;
具有整点报时功能,声响电路发出叫声;
(failed to translate)
- 2013-05-07 10:11:31下载
- 积分:1
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FPGASquare-RootRaised-CosineFilter
数字通信系统中, 基带信号的频谱一般较宽, 因此
传递前需对信号进行成形处理, 以改善其频谱特性,使
得在消除码间干扰与达到最佳检测接收的前提下,提高信道的频带利用率。目前,数字系统中常使用的波形成形滤波器有平方根升余弦滤波器、 高斯滤波器等。设计方法有卷积法或查表法, 其中: 卷积法的实现,需要消耗大量的乘法器与加法器,以构成具有一定延时的流水线结构。为降低硬件消耗,文献提出了一种分(FPGA Implementation of Square Root Raised Cosine Pulse Shaping Filter)
- 2011-05-04 21:23:36下载
- 积分:1
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Tri-Eth
采用xilinx三太以太网ip核,tri-mode MAC完成千兆以太网数据传输(Too Ethernet using xilinx ip three nuclear, tri-mode MAC Gigabit Ethernet data transmission is completed)
- 2014-03-06 22:00:43下载
- 积分:1
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verilogUART
verilog实现的串口实现代码,可以直接复制使用(verilog achieve serial implementation code can be copied directly use)
- 2013-03-19 21:09:23下载
- 积分:1
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实现dds功能,利用quartus软件,
子模块包括加法器,锁相环,date...
实现dds功能,利用quartus软件,
子模块包括加法器,锁相环,date-rom
利用原图将各模块综合,利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.
- 2022-01-26 04:52:55下载
- 积分:1