基于FPGA的快速傅立叶变换实现，适合fpga工程技术人员参考设计...

SDRAM驱动器，自己项目利用的，已经经过实际验证(sdram controller)

quartus工具入门文档，altera公司官方软件翻译全文。-tool for quartus entry documents, altera company official translation of the full text of the software.

codic algorithm,which is used to calculate triangular functions

自编的64B/66B解码程序，做毕业设计的时候写的。(The decoding process 64B/66B , written when i am in the school。)

本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.(FPGA optical encoder input module, there is no experimental, but simulation technology, hope to have reference value.)

说明：  Verilog代码实现四分屏，在Vivado平台下实现的，可仿真(Verilog code realizes four screens, which can be simulated under vivado platform)

Xilinx ISE 8.2i的license-Xilinx ISE 8.2i s license

verilog 写的 多功能数字钟-verilog to write multi-functional digital clock

该资料基于FPGA实现USB2.0的高速传输，即CY7C68013A芯片的数据传输，包括FPGA与上位机之间数据的相互传输，CY7C68013A的传输速率最高可达480M/S。(The FPGA-based high-speed data transmission USB2.0, that CY7C68013A chip data transmission, including the mutual transmission of data between the FPGA and the host machine CY7C68013A transfer rate up to 480M/S.)

Quartus ii 入门基础 仅针对初学者 望各位童鞋们指导 呵呵 (Quartus ii entry basis only for beginners looking to guide their children' s shoes Oh you)